- Thread Starter
- #61
Probably, portability is really not something to worry about right now
I have not made progress during a few months as i had to move and change job. But i restarted working on the project last week. First problem i worked on is a start button bug in FZOOM demo. I debugged the whole button reading part of this rom and i still don't get how it works on the real console Here is an overview:
- the rom starts a dma transfer of the controller state to the RAM
- then it asks to write back and invalidate the cpu cache line of the dma destination
- something is written by the cpu in destination location: at this stage it is only in cpu cache
- the dma ends and
steps 3 and 4 are not always in this order depending on pif timing. It can be considered a bug, the buttons are not always read correctly.... On all over emulators, these kinds of problem can not be seen as cache is not emulated.
Nevertheless all this investigation was useless. The problem was that i was just forgetting to initialize the button state to 0 :/
I still have a few fpu opcodes missing but i hope FZOOM will work soon. This demo may seem simple but it need a large part of the FPU done correctly.
I still have some difficulties to measure time taken by pif operations. For example:
- write to pif ram
- read from pif ram
- reading and writing from/to pif ram using the SI dma.
I anyone has any result on the speed of these operations, i'd be glad to hear how you measured it. Every time i try it seems inconsistent.
I have not made progress during a few months as i had to move and change job. But i restarted working on the project last week. First problem i worked on is a start button bug in FZOOM demo. I debugged the whole button reading part of this rom and i still don't get how it works on the real console Here is an overview:
- the rom starts a dma transfer of the controller state to the RAM
- then it asks to write back and invalidate the cpu cache line of the dma destination
- something is written by the cpu in destination location: at this stage it is only in cpu cache
- the dma ends and
steps 3 and 4 are not always in this order depending on pif timing. It can be considered a bug, the buttons are not always read correctly.... On all over emulators, these kinds of problem can not be seen as cache is not emulated.
Nevertheless all this investigation was useless. The problem was that i was just forgetting to initialize the button state to 0 :/
I still have a few fpu opcodes missing but i hope FZOOM will work soon. This demo may seem simple but it need a large part of the FPU done correctly.
I still have some difficulties to measure time taken by pif operations. For example:
- write to pif ram
- read from pif ram
- reading and writing from/to pif ram using the SI dma.
I anyone has any result on the speed of these operations, i'd be glad to hear how you measured it. Every time i try it seems inconsistent.
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