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POWERPC 750CXe

CyZyco

New member
I've studied the powerpc(gamecube processor) architeture and would like to do emulator to this processor in c++ anyone has courage and would like to join this project or any information to help me?
 

Vegetable

Banned
el_pajero, please do not post things like that, they are not helpful, and VERY VERY annoying. If you can't submit, don't post.
 

Azimer

Emulator Developer
Moderator
IBM has public documentation available... The cube's processor has added hardware to the processor and you will find that information in the illegal Gamecube SDK floating around somewhere. Please don't ask for it in here. That is equivalent to asking for illegal ROM images.
 
OP
C

CyZyco

New member
I already have the IBM specs to PPC and I'm get the dolwin source. I'm codind too to run in linux and windows.
 

Cyberman

Moderator
Moderator
CyZyco and PPC

There is also the issue of the custom opcodes Nintendo used for 'media enhancement'. Nintendo loves proprietary. I wonder if there ever will be a game system that uses more than a standard as a gimick ;)

I suppose dolwin is a good start, however I recomend making documentation your first priority, condense it and make sure it makes sense. Then code it test it see if it works and try again if it does. People are still discovering things about the N64 now.

Cyb
 

Niggy G

HTAFC will rise again!!!
Cyberman said:
There is also the issue of the custom opcodes Nintendo used for 'media enhancement'. Nintendo loves proprietary. I wonder if there ever will be a game system that uses more than a standard as a gimick ;)

I suppose dolwin is a good start, however I recomend making documentation your first priority, condense it and make sure it makes sense. Then code it test it see if it works and try again if it does. People are still discovering things about the N64 now.

Cyb

Can I ask, what exactly are opcodes? - I have a very basic understanding but its a little blury.
 

euphoria

Emutalk Member
opcodes are the only things processor can do (or what you can make it do). typically these include:
MOV (move data register->memory, mem->reg, reg->reg - move)
ADD (reg+immediate data->register, like R1=R2+3 - addition)
MUL (reg*reg->reg, R1=R2*R3 - multiply)

You get the idea. All things your computer does is composed out of opcodes. Normally there are >100 opcodes to a processor.
 

LXS

New member
As euphoria said, opcodes *are* the language machine and there's one code for each instruction that the processor can do.
In x86 asm for example, NOP (No OPeration)instruction is 0x90. And this value is written "directly" to the processor when a NOP is requested.
 

Niggy G

HTAFC will rise again!!!
LXS said:
As euphoria said, opcodes *are* the language machine and there's one code for each instruction that the processor can do.
In x86 asm for example, NOP (No OPeration)instruction is 0x90. And this value is written "directly" to the processor when a NOP is requested.

So the opcodes are really the instriction set? - i.e Intel and AMD use different ones?
 

euphoria

Emutalk Member
Niggy G said:
So the opcodes are really the instriction set? - i.e Intel and AMD use different ones?

No, Intel and AMD both uses the same x86 instruction set and both has the same opcodes, although there might be some differences on rarely used opcodes. If they used different intruction sets then they wouldn't be compatible.
But the SIMD-instruction sets differ, so that 3DNow!, SSE, MMX are completely different "additions" to the x86 instruction set.

opcode = instruction -> opcodes as whole are instruction set :)
 

Niggy G

HTAFC will rise again!!!
euphoria said:
No, Intel and AMD both uses the same x86 instruction set and both has the same opcodes, although there might be some differences on rarely used opcodes. If they used different intruction sets then they wouldn't be compatible.
But the SIMD-instruction sets differ, so that 3DNow!, SSE, MMX are completely different "additions" to the x86 instruction set.

opcode = instruction -> opcodes as whole are instruction set :)

I see, cheers clearing that up for me, :)
 
OP
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CyZyco

New member
Instruction Example:
addic Intruction -0x30000000h : PPC,Gekko
Add Immediate Carrying

addic rD,rA,SIMM
rD ← (rA) + EXTS(SIMM)

0.....5 6.........1011...........1516.........31
OPCD____D________A_______SIMM

rD -> destiny register
OPCD ->opcode (addic is 12 )
rA-> A register
SIMM-> sing int imediate
 
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Doomulation

?????????????????????????
Meh. Emulating stuff is always fun, but I'm not sure I'd be able to emulate a processor. Never done anything such before. Prolly advanced :p
If I could learn or something I'd really be intrested in trying to emulate a cpu.
 

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