What's new

NanoBoyAdvance

fleroviux

Member
Project Page: https://github.com/fleroviux/NanoBoyAdvance
Project Name: NanoBoyAdvance

Hello,

I've just released version 1.2 of my Game Boy Advance emulator (this is the second official release).
The emulator has been around for a few years but only recently I felt comfortable actually releasing anything.

This emulator focuses on being lightweight, accurate and somewhat efficient while keeping the code readable.

Emulation right now is quite accurate, passing all known CPU tests and many other tests.
I've put a lot of effort particularly in accurate timing emulation, including the GamePak prefetch buffer.
The emulator also is relatively fast (though not as ludicrously fast as mGBA or VBA).

There still are a few games with known issues that I will work on for the next release :p

screenshot1.png


Download:
https://github.com/fleroviux/NanoBoyAdvance/releases/
 
Last edited:
OP
F

fleroviux

Member
[MENTION=29958]NES_player4LIFE[/MENTION] thanks for the sticky!

I just released version 1.3 of my GBA emulator.
Notably this is the only software emulator to fully pass the AGS aging cartridge (a hardware test cartridge from Nintendo),
and overall was the first emulator to fully pass it before the Mister FPGA GBA core managed to pass it as well.
With the update the emulator also moved even more towards accurate timing emulation.
It can now handle hardware events on the bus cycle level and DMAs can overtake the bus on any bus cycle (mid-instruction).

https://github.com/fleroviux/NanoboyAdvance/releases/tag/1.3

Changelog:
- ARM: handle CMP, CMN, TST and TEQ with rD = 15
- ARM: handle mode switches when the register bank does not change.
- ARM: removed errorneous user-mode switch from LDRT/STRT opcodes.
- DMA: allow DMAs to take priority over the CPU in the middle of an instruction
- DMA: delay DMA startup by two cycles and account for 2I internal cycles
- DMA: force ROM accesses to increment source address mode
- DMA: respect source address mode setting for FIFO DMA
- DMA: force FIFO DMA to use word sized accesses
- DMA: handle manual disable (via enable flag) more gracefully
- Timer: respect cascade flag in sample rate calculation
- APU: emulate DAC enable bits (fixes #64)
- PPU: match WIN0/1 trigger logic to hardware (thanks @destoer)
- PPU: fix H-blank IRQ timing (once again)
- PPU: better handle internal affine registers when multiple BG modes are used in a single frame.
- PPU: handle invalid BG modes 6 and 7 (thanks @LadyStarbreeze)
- PPU: update internal affine & mosaic registers at the start of H-blank, not at the end.
- MMIO: do not fallthrough on SOUNDBIAS writes (fixes #125)
- Keypad: implemented keypad IRQ (thanks @destoer)
- Serial: implemented a serial IRQ stub
- SDL: always call glewInit() (fixes #129 )
- SDL: use binary directory as current working directory
 
OP
F

fleroviux

Member
NanoBoyAdvance 1.4 is released:

1640037443843.png


Changelog:
  • Audio: added a high-quality software/HLE mixer for the MusicPlayer2000 sound engine
  • Platform: added a new Qt frontend with OpenGL post-processing options
  • PPU: render sprites one scanline ahead (fixes #130)
  • PPU: fix an off-by-one in the OBJ draw loop
  • PPU: apply OAM draw limit only on OAM (instead of pixel) boundaries for now
  • PPU: fix Mode4 transparency (fixes #169)
  • PPU: emulate BG enable delay (fixes #94)
  • PPU: update internal (affine) X/Y registers only if the BG is enabled (fixes #177)
  • Memory: handle 16-bit KEYCNT writes (fixes #152)
  • Memory: HALTCNT and POSTFLG should only be writable from BIOS code
  • Memory: mask top two bits of the IE register
  • DMA: each DMA channel should have its own memory data register (MDR)
  • CPU: rework IRQ signal propagation delay
  • CPU: improve IRQ exception timing
  • CPU: emulate user-mode LDM bus conflict
  • CPU: handle invalid CPU modes
  • CPU: emulate MSR user-mode restrictions
  • CPU: boot into supervisor mode instead of system mode
  • CPU: handle rD=r15 edge-case in CMP/CMN/TST and TEQ
  • CPU: Thumb ALU shifts now mask the shift amount
  • CPU: fix unsigned multiply-long timing
  • EEPROM: fix address masking
 

Top