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  1. #1
    EmuTalk Member HeadHunter2's Avatar
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    Dec 2004
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    General News Factor5 game RSP code

    I'm curious and i have only a OpenGL 2.0 graphics card, so

    which ROM does GlideN64 not yet run?

    By so i mean "missing ucode" ROMs.
    Aren't the Factor5 games nearly working since it's Rouge Squadron ucode ascertained?
    Last edited by HeadHunter2; October 13th, 2017 at 19:56.

  2. #2
    EmuTalk Member HeadHunter2's Avatar
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    Dec 2004
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    enabled Debugger in PJ64 2.3 to dump RSP code,
    started Indiana Jones EU-ROM and got this RSP Snippet:

     0x000	ORI	V1, R0, 0x0000
     0x004	LHU	A0, +0x006A(R0)
     0x008	JAL	0x174
     0x00C	ORI	A1, R0, 0x0000
     0x010	LW	V0, +0x0270(R0)
     0x014	LW	A0, +0x058C(R0)
     0x018	BNE	A0, R0, 0x02C
     0x01C	SW	V0, +0x05A0(R0)
     0x020	MFC0	V0, SP status
     0x024	ANDI	V0, V0, 0x0080
     0x028	BNE	V0, R0, 0x160
     0x02C	LW	S3, +0x0000(S1)
     0x030	LW	S4, +0x0004(S1)
     0x034	ORI	V1, R0, 0x0003
     0x038	SRL	V0, S3, 0x1E
     0x03C	BEQ	V0, V1, 0x098
     0x040	ADDI	S1, S1, 0x0008
     0x044	SRA	V1, S3, 0x17
     0x048	BNE	V0, R0, 0x058
     0x04C	ANDI	V1, V1, 0x01FE
     0x050	LHU	V0, +0x00B6(V1)
     0x054	JR	V0
     0x058	LHU	V0, -0x009C(V1)
     0x05C	JR	V0
     0x060	ORI	V0, R0, 0x0378
     0x064	BNE	S1, V0, 0x02C
     0x068	ORI	RA, R0, 0x1010
     0x06C	LW	V0, +0x05A0(R0)
     0x070	ORI	A0, R0, 0x0107
     0x074	ORI	V1, R0, 0x0270
     0x078	SW	V0, +0x05A4(R0)
     0x07C	ADDIU	S1, V1, 0x0008
     0x080	MTC0	V1, SP memory address
     0x084	MTC0	V0, SP DRAM DMA address
     0x088	MTC0	A0, SP read DMA length
     0x08C	BNE	V0, R0, 0x08C
     0x090	MFC0	V0, SP DMA busy
     0x094	JR	RA
     0x098	SRL	V0, S3, 0x19
     0x09C	ORI	V1, R0, 0x0072
     0x0A0	BEQ	V0, V1, 0x0B4
     0x0A4	SW	S3, +0x0000(S0)
     0x0A8	SW	S4, +0x0004(S0)
     0x0AC	J	0x0D0
     0x0B0	ADDIU	S0, S0, 0x0008
     0x0B4	JAL	0x7B0
     0x0B8	ADDIU	S1, S1, 0x0008
     0x0BC	LDV	$v3[0], -0x002(S1)
     0x0C0	LDV	$v3[8], -0x001(S1)
     0x0C4	ADDIU	S0, S0, 0x0010
     0x0C8	SDV	$v3[0], -0x002(S0)
     0x0CC	SDV	$v3[8], -0x001(S0)
     0x0D0	ADDI	V0, S0, 0xF090
     0x0D4	BLEZ	V0, 0x060
     0x0D8	ORI	RA, R0, 0x1060
     0x0DC	LW	T0, +0x0008(S2)
     0x0E0	ADDI	T2, S0, 0xF180
     0x0E4	BEQZ	T2, 0x158
     0x0E8	ADD	A0, T0, T2
     0x0EC	LW	S0, +0x0004(S2)
     0x0F0	SUB	A0, S0, A0
     0x0F4	BGEZ	A0, 0x118
     0x0F8	MFC0	A0, DP CMD status
     0x0FC	ANDI	A0, A0, 0x0400
     0x100	BNE	A0, R0, 0x0F8
     0x104	LW	T0, +0x0000(S2)
     0x108	MFC0	S0, DP CMD DMA current
     0x10C	BEQ	S0, T0, 0x108
     0x110	NOP
     0x114	MTC0	T0, DP CMD DMA start
     0x118	MFC0	S0, DP CMD DMA current
     0x11C	SUB	A0, T0, S0
     0x120	BGEZ	A0, 0x130
     0x124	ADD	A0, T0, T2
     0x128	SUB	A0, A0, S0
     0x12C	BGEZ	A0, 0x118
     0x130	ADDU	S0, T0, T2
     0x134	ORI	A1, R0, 0x0E80
     0x138	ADDIU	A0, T2, 0xFFFF
     0x13C	MTC0	A1, SP memory address
     0x140	MTC0	T0, SP DRAM DMA address
     0x144	MTC0	A0, SP write DMA length
     0x148	BNE	A0, R0, 0x148
     0x14C	MFC0	A0, SP DMA busy
     0x150	SW	S0, +0x0008(S2)
     0x154	MTC0	S0, DP CMD DMA end
     0x158	JR	RA
     0x15C	ORI	S0, R0, 0x0E80
     0x160	ORI	A1, R0, 0x0006
     0x164	LHU	A0, +0x006A(A1)
     0x168	LBU	V0, +0x0143(R0)
     0x16C	SRL	V1, A0, 0xC
     0x170	BEQ	A1, V0, 0x19C
     0x174	SH	RA, +0x016A(R0)
     0x178	SB	A1, +0x0143(R0)
     0x17C	LHU	V0, +0x006B(A1)
     0x180	ANDI	A0, A0, 0x0FFC
     0x184	ADDI	A0, A0, 0xFFFF
     0x188	LW	A1, +0x0FD0(R0)
     0x18C	SLL	V0, V0, 0x4
     0x190	ANDI	V0, V0, 0x3FF0
     0x194	ADD	V0, V0, A1
     0x198	JAL	0x080
     0x19C	LHU	V1, +0x0064(V1)
     0x1A0	JR	V1
     0x1A4	LHU	RA, +0x016A(R0)
     0x1A8	LHU	A2, +0x0024(T5)
     0x1AC	LHU	V0, +0x0024(T4)
     0x1B0	LHU	V1, +0x0024(T3)
     0x1B4	AND	A3, A2, V0
     0x1B8	AND	A3, A3, V1
     0x1BC	ANDI	A3, A3, 0x7070
     0x1C0	BNE	A3, R0, 0x744
     0x1C4	OR	A2, A2, V0
     0x1C8	OR	A2, A2, V1
     0x1CC	ANDI	A2, A2, 0x4343
     0x1D0	BNE	A2, R0, 0x164
     0x1D4	ORI	A1, R0, 0x0003
     0x1D8	OR	S8, R0, RA
     0x1DC	LLV	$v13[0], +0x006(T3)
     0x1E0	LLV	$v14[0], +0x006(T4)
     0x1E4	LLV	$v15[0], +0x006(T5)
     0x1E8	ORI	T8, R0, 0x0F80
     0x1EC	LSV	$v21[0], +0x01F(S2)
     0x1F0	LSV	$v5[0], +0x003(T3)
     0x1F4	VSUB	$v10, $v14, $v13
     0x1F8	LSV	$v6[0], +0x007(T3)
     0x1FC	VSUB	$v9, $v15, $v13
     0x200	LSV	$v5[2], +0x003(T4)
     0x204	VSUB	$v12, $v13, $v14
     0x208	LSV	$v6[2], +0x007(T4)
     0x20C	LSV	$v5[4], +0x003(T5)
     0x210	LSV	$v6[4], +0x007(T5)
     0x214	VMUDH	$v16, $v9, $v10 [1]
     0x218	LH	T0, +0x001A(T3)
     0x21C	VMADH	$v16, $v12, $v9 [1]
     0x220	LH	T9, +0x001A(T4)
     0x224	VSAW	$v28, $v28, $v28 [1]
     0x228	LH	K0, +0x001A(T5)
     0x22C	VSAW	$v29, $v29, $v29 [0]
     0x230	SLL	V1, S5, 0x12
     0x234	MFC2	A0, $v16[0]
     0x238	SH	T3, +0x0F80(R0)
     0x23C	SH	T4, +0x0F82(R0)
     0x240	AND	V1, A0, V1
     0x244	BLTZ	V1, 0x9E4
     0x248	SH	T5, +0x0F84(R0)
     0x24C	SLT	V0, K0, T9
     0x250	SLT	K1, T9, T0
     0x254	SLL	V0, V0, 0x1
     0x258	OR	V0, V0, K1
     0x25C	SLT	K1, T0, K0
     0x260	SLL	V0, V0, 0x1
     0x264	OR	V0, V0, K1
     0x268	LBU	T5, +0x009A(V0)
     0x26C	LBU	T4, +0x00A1(V0)
     0x270	LBU	T3, +0x00A8(V0)
     0x274	LHU	T5, +0x0F80(T5)
     0x278	LHU	T4, +0x0F80(T4)
     0x27C	LHU	T3, +0x0F80(T3)
     0x280	LBU	K1, +0x00AF(V0)
     0x284	LLV	$v15[0], +0x006(T5)
     0x288	LLV	$v14[0], +0x006(T4)
     0x28C	BLEZ	K1, 0x29C
     0x290	LLV	$v13[0], +0x006(T3)
     0x294	VSUBC	$v28, $v30, $v28
     0x298	VSUB	$v29, $v30, $v29
     0x29C	BEQZ	A0, 0x740
     0x2A0	VSUB	$v4, $v15, $v14
     0x2A4	JAL	0x7B0
     0x2A8	VSUB	$v10, $v14, $v13
     0x2AC	VSUB	$v9, $v15, $v13
     0x2B0	VMOV	$v29[3], $v29 [0]
     0x2B4	VMOV	$v28[3], $v28 [0]
     0x2B8	SSV	$v15[2], +0x001(S0)
     0x2BC	VMOV	$v4[2], $v10 [0]
     0x2C0	SSV	$v14[2], +0x002(S0)
     0x2C4	VMOV	$v4[3], $v10 [1]
     0x2C8	SSV	$v13[2], +0x003(S0)
     0x2CC	VMOV	$v4[4], $v9 [0]
     0x2D0	MFC2	T6, $v29[5]
     0x2D4	VMOV	$v4[5], $v9 [1]
     0x2D8	JAL	0xA08
     0x2DC	VMUDN	$v2, $v13, $v30 [3]
     0x2E0	ANDI	T2, S5, 0x00FF
     0x2E4	VMUDM	$v9, $v4, $v30 [3]
     0x2E8	VMADN	$v10, $v30, $v30 [0]
     0x2EC	ANDI	T6, T6, 0x0080
     0x2F0	VRCP	$v8[1], $v4 [1]
     0x2F4	ORI	T2, T2, 0x00C8
     0x2F8	VRCPH	$v7[1], $v30 [0]
     0x2FC	LBU	V0, +0x003A(S2)
     0x300	VRCP	$v8[3], $v4 [3]
     0x304	VRCPH	$v7[3], $v30 [0]
     0x308	VRCP	$v8[5], $v4 [5]
     0x30C	VRCPH	$v7[5], $v30 [0]
     0x310	OR	T6, T6, V0
     0x314	VMUDL	$v8, $v8, $v31 [4]
     0x318	SB	T2, +0x0000(S0)
     0x31C	VMADM	$v7, $v7, $v31 [4]
     0x320	SB	T6, +0x0001(S0)
     0x324	VMADN	$v8, $v30, $v30 [0]
     0x328	VMUDH	$v4, $v4, $v30 [5]
     0x32C	LSV	$v12[0], +0x00C(T4)
     0x330	VMUDL	$v6, $v6, $v21 [0]
     0x334	LSV	$v12[4], +0x00C(T3)
     0x338	VMADM	$v5, $v5, $v21 [0]
     0x33C	LSV	$v12[8], +0x00C(T3)
     0x340	VMADN	$v6, $v30, $v30 [0]
     0x344	VMUDL	$v1, $v8, $v10 [0q]
     0x348	VMADM	$v1, $v7, $v10 [0q]
     0x34C	VMADN	$v1, $v8, $v9 [0q]
     0x350	VMADH	$v0, $v7, $v9 [0q]
     0x354	VMADN	$v1, $v30, $v30 [0]
     0x358	VMUDL	$v8, $v8, $v30 [3]
     0x35C	VMADM	$v7, $v7, $v30 [3]
     0x360	VMADN	$v8, $v30, $v30 [0]
     0x364	VMUDL	$v1, $v1, $v30 [3]
     0x368	VMADM	$v0, $v0, $v30 [3]
     0x36C	VMADN	$v1, $v30, $v30 [0]
     0x370	VAND	$v16, $v1, $v31 [1]
     0x374	VMUDM	$v12, $v12, $v30 [3]
     0x378	VMADN	$v13, $v30, $v30 [0]
     0x37C	VCR	$v0, $v0, $v31 [6]
     0x380	SSV	$v12[0], +0x004(S0)
     0x384	VMUDL	$v11, $v16, $v2 [1]
     0x388	SSV	$v13[0], +0x005(S0)
     0x38C	VMADM	$v10, $v0, $v2 [1]
     0x390	SSV	$v0[2], +0x006(S0)
     0x394	VMADN	$v11, $v30, $v30 [0]
     0x398	SSV	$v1[2], +0x007(S0)
     0x39C	ANDI	V0, T2, 0x0002
     0x3A0	ADDI	SP, T8, 0x0010
     0x3A4	VSUBC	$v3, $v13, $v11 [1q]
     0x3A8	SSV	$v0[10], +0x00A(S0)
     0x3AC	VSUB	$v9, $v12, $v10 [1q]
     0x3B0	SSV	$v1[10], +0x00B(S0)
     0x3B4	VSUBC	$v21, $v6, $v6 [1]
     0x3B8	SSV	$v0[6], +0x00E(S0)
     0x3BC	VLT	$v19, $v5, $v5 [1]
     0x3C0	SSV	$v1[6], +0x00F(S0)
     0x3C4	VMRG	$v20, $v6, $v6 [1]
     0x3C8	SSV	$v9[8], +0x008(S0)
     0x3CC	VSUBC	$v21, $v20, $v6 [2]
     0x3D0	SSV	$v3[8], +0x009(S0)
     0x3D4	VLT	$v19, $v19, $v5 [2]
     0x3D8	SSV	$v9[4], +0x00C(S0)
     0x3DC	VMRG	$v20, $v20, $v6 [2]
     0x3E0	SSV	$v3[4], +0x00D(S0)
     0x3E4	ADDI	S0, S0, 0x0020
     0x3E8	BLEZ	V0, 0x4AC
     0x3EC	LLV	$v9[0], +0x005(T3)
     0x3F0	LLV	$v9[8], +0x005(T4)
     0x3F4	LLV	$v22[0], +0x005(T5)
     0x3F8	ANDI	V0, S5, 0x1000
     0x3FC	BNE	V0, R0, 0x470
     0x400	VMUDL	$v20, $v20, $v31 [5]
     0x404	VMADM	$v19, $v19, $v31 [5]
     0x408	VMADN	$v20, $v30, $v30 [0]
     0x40C	LSV	$v11[0], +0x011(T3)
     0x410	LSV	$v12[0], +0x010(T3)
     0x414	LSV	$v11[8], +0x011(T4)
     0x418	VMOV	$v9[2], $v31 [0]
     0x41C	LSV	$v12[8], +0x010(T4)
     0x420	VMOV	$v9[6], $v31 [0]
     0x424	LSV	$v24[0], +0x011(T5)
     0x428	VMOV	$v22[2], $v31 [0]
     0x42C	LSV	$v25[0], +0x010(T5)
     0x430	VMUDL	$v6, $v11, $v20 [0]
     0x434	VMADM	$v6, $v12, $v20 [0]
     0x438	SSV	$v19[0], +0x022(T8)
     0x43C	VMADN	$v6, $v11, $v19 [0]
     0x440	SSV	$v20[0], +0x026(T8)
     0x444	VMADH	$v5, $v12, $v19 [0]
     0x448	VMUDL	$v16, $v24, $v20 [0]
     0x44C	VMADM	$v16, $v25, $v20 [0]
     0x450	VMADN	$v20, $v24, $v19 [0]
     0x454	VMADH	$v19, $v25, $v19 [0]
     0x458	VMUDM	$v16, $v9, $v6 [0h]
     0x45C	VMADH	$v9, $v9, $v5 [0h]
     0x460	VMADN	$v10, $v30, $v30 [0]
     0x464	VMUDM	$v16, $v22, $v20 [0]
     0x468	VMADH	$v22, $v22, $v19 [0]
     0x46C	VMADN	$v23, $v30, $v30 [0]
     0x470	SDV	$v9[8], +0x002(SP)
     0x474	SDV	$v10[8], +0x003(SP)
     0x478	SDV	$v9[0], +0x000(SP)
     0x47C	SDV	$v10[0], +0x001(SP)
     0x480	SDV	$v22[0], +0x004(SP)
     0x484	SDV	$v23[0], +0x005(SP)
     0x488	VABS	$v9, $v9, $v9
     0x48C	LLV	$v19[0], +0x004(SP)
     0x490	VABS	$v22, $v22, $v22
     0x494	LLV	$v20[0], +0x006(SP)
     0x498	VABS	$v19, $v19, $v19
     0x49C	VGE	$v17, $v9, $v22
     0x4A0	VMRG	$v18, $v10, $v23
     0x4A4	VGE	$v17, $v17, $v19
     0x4A8	VMRG	$v18, $v18, $v20
     0x4AC	SLV	$v17[0], +0x010(T8)
     0x4B0	SLV	$v18[0], +0x012(T8)
     0x4B4	VXOR	$v18, $v30, $v30
     0x4B8	LUV	$v25[0], +0x002(T5)
     0x4BC	VADD	$v16, $v18, $v31 [5]
     0x4C0	LUV	$v15[0], +0x002(T3)
     0x4C4	VADD	$v24, $v18, $v31 [5]
     0x4C8	LUV	$v23[0], +0x002(T4)
     0x4CC	VADD	$v5, $v18, $v31 [5]
     0x4D0	VMUDM	$v25, $v25, $v30 [7]
     0x4D4	VMUDM	$v15, $v15, $v30 [7]
     0x4D8	VMUDM	$v23, $v23, $v30 [7]
     0x4DC	LDV	$v16[8], +0x003(T8)
     0x4E0	LDV	$v15[8], +0x002(T8)
     0x4E4	LDV	$v24[8], +0x005(T8)
     0x4E8	LDV	$v23[8], +0x004(T8)
     0x4EC	LDV	$v5[8], +0x007(T8)
     0x4F0	LDV	$v25[8], +0x006(T8)
     0x4F4	LSV	$v16[14], +0x00F(T3)
     0x4F8	LSV	$v15[14], +0x00E(T3)
     0x4FC	LSV	$v24[14], +0x00F(T4)
     0x500	LSV	$v23[14], +0x00E(T4)
     0x504	LSV	$v5[14], +0x00F(T5)
     0x508	LSV	$v25[14], +0x00E(T5)
     0x50C	VSUBC	$v12, $v24, $v16
     0x510	VSUB	$v11, $v23, $v15
     0x514	VSUBC	$v20, $v16, $v5
     0x518	VSUB	$v19, $v15, $v25
     0x51C	VSUBC	$v10, $v5, $v16
     0x520	VSUB	$v9, $v25, $v15
     0x524	VSUBC	$v22, $v16, $v24
     0x528	VSUB	$v21, $v15, $v23
     0x52C	VMUDN	$v6, $v10, $v4 [3]
     0x530	VMADH	$v6, $v9, $v4 [3]
     0x534	VMADN	$v6, $v22, $v4 [5]
     0x538	VMADH	$v6, $v21, $v4 [5]
     0x53C	VSAW	$v9, $v9, $v9 [0]
     0x540	VSAW	$v10, $v10, $v10 [1]
     0x544	VMUDN	$v6, $v12, $v4 [4]
     0x548	VMADH	$v6, $v11, $v4 [4]
     0x54C	VMADN	$v6, $v20, $v4 [2]
     0x550	VMADH	$v6, $v19, $v4 [2]
     0x554	VSAW	$v11, $v11, $v11 [0]
     0x558	VSAW	$v12, $v12, $v12 [1]
     0x55C	VMUDL	$v6, $v10, $v26 [3]
     0x560	VMADM	$v6, $v9, $v26 [3]
     0x564	VMADN	$v10, $v10, $v27 [3]
     0x568	VMADH	$v9, $v9, $v27 [3]
     0x56C	VMUDL	$v6, $v12, $v26 [3]
     0x570	VMADM	$v6, $v11, $v26 [3]
     0x574	VMADN	$v12, $v12, $v27 [3]
     0x578	SDV	$v9[0], +0x001(S0)
     0x57C	VMADH	$v11, $v11, $v27 [3]
     0x580	SDV	$v10[0], +0x003(S0)
     0x584	VMUDN	$v6, $v12, $v30 [1]
     0x588	VMADH	$v6, $v11, $v30 [1]
     0x58C	VMADL	$v6, $v10, $v1 [5]
     0x590	VMADM	$v6, $v9, $v1 [5]
     0x594	VMADN	$v14, $v10, $v0 [5]
     0x598	SDV	$v11[0], +0x005(S0)
     0x59C	VMADH	$v13, $v9, $v0 [5]
     0x5A0	SDV	$v12[0], +0x007(S0)
     0x5A4	VMUDL	$v28, $v14, $v2 [1]
     0x5A8	SDV	$v13[0], +0x004(S0)
     0x5AC	VMADM	$v6, $v13, $v2 [1]
     0x5B0	SDV	$v14[0], +0x006(S0)
     0x5B4	VMADN	$v28, $v30, $v30 [0]
     0x5B8	VSUBC	$v18, $v16, $v28
     0x5BC	VSUB	$v17, $v15, $v6
     0x5C0	ANDI	V0, T2, 0x0004
     0x5C4	BLEZ	V0, 0x5D8
     0x5C8	ANDI	V0, T2, 0x0002
     0x5CC	ADDI	S0, S0, 0x0040
     0x5D0	SDV	$v17[0], -0x008(S0)
     0x5D4	SDV	$v18[0], -0x006(S0)
     0x5D8	BLEZ	V0, 0x6D4
     0x5DC	ANDI	V0, T2, 0x0001
     0x5E0	ORI	V1, R0, 0x0800
     0x5E4	MTC2	V1, $v19[0]
     0x5E8	VABS	$v24, $v9, $v9
     0x5EC	LDV	$v20[8], +0x008(T8)
     0x5F0	VABS	$v25, $v11, $v11
     0x5F4	LDV	$v21[8], +0x009(T8)
     0x5F8	VMUDM	$v24, $v24, $v19 [0]
     0x5FC	VMADN	$v26, $v30, $v30 [0]
     0x600	VMUDM	$v25, $v25, $v19 [0]
     0x604	VMADN	$v27, $v30, $v30 [0]
     0x608	VMUDL	$v21, $v21, $v19 [0]
     0x60C	VMADM	$v20, $v20, $v19 [0]
     0x610	VMADN	$v21, $v30, $v30 [0]
     0x614	VMUDN	$v26, $v26, $v30 [2]
     0x618	VMADH	$v24, $v24, $v30 [2]
     0x61C	VMADN	$v26, $v30, $v30 [0]
     0x620	VMADN	$v23, $v27, $v30 [1]
     0x624	VMADH	$v22, $v25, $v30 [1]
     0x628	VMADN	$v6, $v21, $v30 [1]
     0x62C	VMADH	$v5, $v20, $v30 [1]
     0x630	VSUBC	$v23, $v6, $v6 [5]
     0x634	VGE	$v5, $v5, $v5 [5]
     0x638	VMRG	$v6, $v6, $v6 [5]
     0x63C	VSUBC	$v23, $v6, $v6 [6]
     0x640	VGE	$v5, $v5, $v5 [6]
     0x644	VMRG	$v6, $v6, $v6 [6]
     0x648	VMUDL	$v6, $v6, $v31 [3]
     0x64C	VMADM	$v5, $v5, $v31 [3]
     0x650	VMADN	$v6, $v30, $v30 [0]
     0x654	VRCPH	$v23[0], $v5 [4]
     0x658	VRCPL	$v6[0], $v6 [4]
     0x65C	VRCPH	$v5[0], $v30 [0]
     0x660	VMUDN	$v6, $v6, $v30 [2]
     0x664	VMADH	$v5, $v5, $v30 [2]
     0x668	VLT	$v5, $v5, $v30 [1]
     0x66C	VMRG	$v6, $v6, $v30 [0]
     0x670	VMUDL	$v20, $v18, $v6 [0]
     0x674	VMADM	$v20, $v17, $v6 [0]
     0x678	VMADN	$v20, $v18, $v5 [0]
     0x67C	VMADH	$v19, $v17, $v5 [0]
     0x680	VMUDL	$v22, $v10, $v6 [0]
     0x684	VMADM	$v22, $v9, $v6 [0]
     0x688	VMADN	$v22, $v10, $v5 [0]
     0x68C	SDV	$v19[8], +0x000(S0)
     0x690	VMADH	$v21, $v9, $v5 [0]
     0x694	SDV	$v20[8], +0x002(S0)
     0x698	VMUDL	$v24, $v12, $v6 [0]
     0x69C	VMADM	$v24, $v11, $v6 [0]
     0x6A0	VMADN	$v24, $v12, $v5 [0]
     0x6A4	SDV	$v21[8], +0x001(S0)
     0x6A8	VMADH	$v23, $v11, $v5 [0]
     0x6AC	SDV	$v22[8], +0x003(S0)
     0x6B0	VMUDL	$v26, $v14, $v6 [0]
     0x6B4	VMADM	$v26, $v13, $v6 [0]
     0x6B8	VMADN	$v26, $v14, $v5 [0]
     0x6BC	SDV	$v23[8], +0x005(S0)
     0x6C0	VMADH	$v25, $v13, $v5 [0]
     0x6C4	SDV	$v24[8], +0x007(S0)
     0x6C8	ADDIU	S0, S0, 0x0040
     0x6CC	SDV	$v25[8], -0x004(S0)
     0x6D0	SDV	$v26[8], -0x002(S0)
     0x6D4	BLEZ	V0, 0x740
     0x6D8	VMUDN	$v14, $v14, $v31 [4]
     0x6DC	VMADH	$v13, $v13, $v31 [4]
     0x6E0	VMADN	$v14, $v30, $v30 [0]
     0x6E4	VMUDN	$v16, $v16, $v31 [4]
     0x6E8	VMADH	$v15, $v15, $v31 [4]
     0x6EC	VMADN	$v16, $v30, $v30 [0]
     0x6F0	SSV	$v13[14], +0x004(S0)
     0x6F4	VMUDN	$v10, $v10, $v31 [4]
     0x6F8	SSV	$v14[14], +0x005(S0)
     0x6FC	VMADH	$v9, $v9, $v31 [4]
     0x700	VMADN	$v10, $v30, $v30 [0]
     0x704	VMUDN	$v12, $v12, $v31 [4]
     0x708	VMADH	$v11, $v11, $v31 [4]
     0x70C	VMADN	$v12, $v30, $v30 [0]
     0x710	SSV	$v9[14], +0x002(S0)
     0x714	VMUDL	$v28, $v14, $v2 [1]
     0x718	SSV	$v10[14], +0x003(S0)
     0x71C	VMADM	$v6, $v13, $v2 [1]
     0x720	SSV	$v11[14], +0x006(S0)
     0x724	VMADN	$v28, $v30, $v30 [0]
     0x728	SSV	$v12[14], +0x007(S0)
     0x72C	VSUBC	$v18, $v16, $v28
     0x730	VSUB	$v17, $v15, $v6
     0x734	ADDIU	S0, S0, 0x0010
     0x738	SSV	$v17[14], -0x008(S0)
     0x73C	SSV	$v18[14], -0x007(S0)
     0x740	OR	RA, R0, S8
     0x744	JR	RA
     0x748	SB	R0, +0x058A(R0)
     0x74C	NOP
     0x750	LW	V1, +0x05A4(R0)
     0x754	LBU	V0, +0x0032(S2)
     0x758	SW	V1, +0x0FE0(V0)
     0x75C	SW	S1, +0x0FE4(V0)
     0x760	ADDI	V0, V0, 0x0008
     0x764	SB	V0, +0x0032(S2)
     0x768	OR	V0, R0, S4
     0x76C	J	0x070
     0x770	ORI	RA, R0, 0x1010
     0x774	LBU	T0, +0x0032(S2)
     0x778	ADDI	T0, T0, 0xFFF8
     0x77C	BLTZ	T0, 0x164
     0x780	ORI	A1, R0, 0x001E
     0x784	SB	T0, +0x0032(S2)
     0x788	JAL	0x070
     0x78C	LW	V0, +0x0FE0(T0)
     0x790	BEQZ	S4, 0x010
     0x794	LW	S1, +0x0FE4(T0)
     0x798	LW	V0, +0x0270(R0)
     0x79C	LHU	S8, +0x0590(R0)
     0x7A0	LHU	RA, +0x0592(R0)
     0x7A4	LHU	T3, +0x0594(R0)
     0x7A8	SW	V0, +0x05A0(R0)
     0x7AC	SW	R0, +0x058C(R0)
     0x7B0	LW	V0, +0x058C(R0)
     0x7B4	BEQZ	V0, 0x0DC
     0x7B8	SH	S8, +0x0590(R0)
     0x7BC	SH	RA, +0x0592(R0)
     0x7C0	SH	T3, +0x0594(R0)
     0x7C4	J	0x750
     0x7C8	ORI	S4, V0, 0x0000
     0x7CC	LW	V1, +0x000C(S2)
     0x7D0	SRL	V0, S3, 0x17
     0x7D4	ANDI	V0, V0, 0x0001
     0x7D8	BNE	V0, V1, 0x060
     0x7DC	SRL	A0, S3, 0x10
     0x7E0	ANDI	A0, A0, 0x0007
     0x7E4	LW	A1, +0x0120(A0)
     0x7E8	LUI	AT, 0x8000
     0x7EC	SRAV	AT, AT, S3
     0x7F0	SRL	V0, S3, 0x8
     0x7F4	SRLV	AT, AT, V0
     0x7F8	NOR	AT, AT, R0
     0x7FC	AND	A1, A1, AT
     0x800	OR	A1, A1, S4
     0x804	SW	A1, +0x0120(A0)
     0x808	LW	S3, +0x0010(S2)
     0x80C	LW	S4, +0x0014(S2)
     0x810	LBU	V0, -0x0008(S0)
     0x814	ADDI	V1, S0, 0xF180
     0x818	BEQZ	V1, 0x0A4
     0x81C	ADDI	V0, V0, 0xFF11
     0x820	BNE	V0, R0, 0x0A4
     0x824	NOP
     0x828	SW	S3, -0x0008(S0)
     0x82C	J	0x060
     0x830	SW	S4, -0x0004(S0)
     0x834	ORI	T1, R0, 0x0600
     0x838	ORI	T5, R0, 0x0170
     0x83C	JAL	0x9EC
     0x840	ORI	V0, R0, 0x05C0
     0x844	LDV	$v8[0], +0x000(V0)
     0x848	LDV	$v9[0], +0x001(V0)
     0x84C	LDV	$v10[0], +0x002(V0)
     0x850	LDV	$v11[0], +0x003(V0)
     0x854	LDV	$v12[0], +0x004(V0)
     0x858	LDV	$v13[0], +0x005(V0)
     0x85C	LDV	$v14[0], +0x006(V0)
     0x860	LDV	$v15[0], +0x007(V0)
     0x864	LDV	$v8[8], +0x000(V0)
     0x868	LDV	$v9[8], +0x001(V0)
     0x86C	LDV	$v10[8], +0x002(V0)
     0x870	LDV	$v11[8], +0x003(V0)
     0x874	LDV	$v12[8], +0x004(V0)
     0x878	LDV	$v13[8], +0x005(V0)
     0x87C	LDV	$v14[8], +0x006(V0)
     0x880	LDV	$v15[8], +0x007(V0)
     0x884	LDV	$v17[0], +0x003(S2)
     0x888	LDV	$v17[8], +0x003(S2)
     0x88C	LQV	$v2[0], +0x000(T5)
     0x890	SLL	V1, S5, 0xF
     0x894	VADDC	$v2, $v17, $v2
     0x898	VMUDN	$v28, $v12, $v2 [0h]
     0x89C	ADDI	T5, T5, 0x0010
     0x8A0	VMADH	$v28, $v8, $v2 [0h]
     0x8A4	VMADN	$v28, $v13, $v2 [1h]
     0x8A8	VMADH	$v28, $v9, $v2 [1h]
     0x8AC	VMADN	$v28, $v14, $v2 [2h]
     0x8B0	VMADH	$v28, $v10, $v2 [2h]
     0x8B4	VMADN	$v28, $v15, $v30 [1]
     0x8B8	VMADH	$v29, $v11, $v30 [1]
     0x8BC	LSV	$v21[0], +0x003(R0)
     0x8C0	VMUDN	$v20, $v28, $v21 [0]
     0x8C4	VMADH	$v21, $v29, $v21 [0]
     0x8C8	VCH	$v3, $v29, $v29 [3h]
     0x8CC	VCL	$v3, $v28, $v28 [3h]
     0x8D0	CFC2	T3, 1
     0x8D4	VCH	$v3, $v29, $v21 [3h]
     0x8D8	VCL	$v3, $v28, $v20 [3h]
     0x8DC	ANDI	V0, T3, 0x0707
     0x8E0	ANDI	T3, T3, 0x7070
     0x8E4	SLL	V0, V0, 0x4
     0x8E8	SLL	T3, T3, 0x10
     0x8EC	OR	T3, T3, V0
     0x8F0	CFC2	T4, 1
     0x8F4	VADD	$v21, $v29, $v30 [0]
     0x8F8	ANDI	V0, T4, 0x0707
     0x8FC	ANDI	T4, T4, 0x7070
     0x900	VADD	$v20, $v28, $v30 [0]
     0x904	SLL	T4, T4, 0xC
     0x908	VMUDL	$v28, $v28, $v19 [0]
     0x90C	OR	V0, V0, T4
     0x910	VMADM	$v29, $v29, $v19 [0]
     0x914	OR	V0, V0, T3
     0x918	VMADN	$v28, $v30, $v30 [0]
     0x91C	JAL	0xA08
     0x920	SH	V0, +0x0024(T1)
     0x924	VGE	$v6, $v27, $v30 [0]
     0x928	VMRG	$v6, $v27, $v31 [0]
     0x92C	SDV	$v21[0], +0x000(T1)
     0x930	SDV	$v20[0], +0x001(T1)
     0x934	VMUDL	$v5, $v20, $v26 [3h]
     0x938	VMADM	$v5, $v21, $v26 [3h]
     0x93C	VMADN	$v5, $v20, $v6 [3h]
     0x940	VMADH	$v4, $v21, $v6 [3h]
     0x944	ADDI	T2, T2, 0xFFFE
     0x948	VMUDL	$v5, $v5, $v19 [0]
     0x94C	VMADM	$v4, $v4, $v19 [0]
     0x950	VMADN	$v5, $v30, $v30 [0]
     0x954	VMUDH	$v7, $v1, $v30 [1]
     0x958	LQV	$v2[0], +0x000(T5)
     0x95C	VMADN	$v7, $v5, $v0
     0x960	LDV	$v29[0], +0x00A(R0)
     0x964	VMADH	$v6, $v4, $v0
     0x968	LDV	$v29[8], +0x00A(R0)
     0x96C	VMADN	$v7, $v30, $v30 [0]
     0x970	BGEZ	V1, 0x9AC
     0x974	VGE	$v6, $v6, $v29 [1q]
     0x978	LQV	$v3[0], +0x016(R0)
     0x97C	VMUDL	$v16, $v5, $v3 [1]
     0x980	VMADM	$v16, $v4, $v3 [1]
     0x984	VMADN	$v5, $v5, $v3 [0]
     0x988	VMADH	$v4, $v4, $v3 [0]
     0x98C	VADDC	$v5, $v5, $v3 [3]
     0x990	VADD	$v4, $v4, $v3 [2]
     0x994	VMUDN	$v5, $v5, $v3 [4]
     0x998	VMADH	$v4, $v4, $v3 [4]
     0x99C	VGE	$v4, $v4, $v30 [0]
     0x9A0	VLT	$v4, $v4, $v3 [4]
     0x9A4	SBV	$v4[5], +0x013(T1)
     0x9A8	SBV	$v4[13], +0x03B(T1)
     0x9AC	SDV	$v6[0], +0x003(T1)
     0x9B0	SSV	$v7[4], +0x00F(T1)
     0x9B4	SSV	$v27[6], +0x010(T1)
     0x9B8	BLTZ	T2, 0x9E4
     0x9BC	SSV	$v26[6], +0x011(T1)
     0x9C0	SDV	$v21[8], +0x005(T1)
     0x9C4	SDV	$v20[8], +0x006(T1)
     0x9C8	SDV	$v6[8], +0x008(T1)
     0x9CC	SW	V0, +0x004C(T1)
     0x9D0	SSV	$v7[12], +0x023(T1)
     0x9D4	SSV	$v27[14], +0x024(T1)
     0x9D8	SSV	$v26[14], +0x025(T1)
     0x9DC	BGTZ	T2, 0x894
     0x9E0	ADDI	T1, T1, 0x0050
     0x9E4	JR	S8
     0x9E8	NOP
     0x9EC	LDV	$v0[0], +0x004(S2)
     0x9F0	LDV	$v1[0], +0x005(S2)
     0x9F4	LDV	$v0[8], +0x004(S2)
     0x9F8	LDV	$v1[8], +0x005(S2)
     0x9FC	LSV	$v19[0], +0x01F(S2)
     0xA00	JR	RA
     0xA04	NOP
     0xA08	VRCPH	$v27[3], $v29 [3]
     0xA0C	VRCPL	$v26[3], $v28 [3]
     0xA10	VRCPH	$v27[3], $v29 [7]
     0xA14	VRCPL	$v26[7], $v28 [7]
     0xA18	VRCPH	$v27[7], $v30 [0]
     0xA1C	VMUDN	$v26, $v26, $v30 [2]
     0xA20	VMADH	$v27, $v27, $v30 [2]
     0xA24	VMADN	$v26, $v30, $v30 [0]
     0xA28	VSUBC	$v22, $v22, $v22
     0xA2C	VADDC	$v23, $v22, $v30 [2]
     0xA30	VMUDL	$v24, $v26, $v28
     0xA34	VMADM	$v24, $v27, $v28
     0xA38	VMADN	$v24, $v26, $v29
     0xA3C	VMADH	$v25, $v27, $v29
     0xA40	VSUBC	$v24, $v22, $v24
     0xA44	VSUB	$v25, $v23, $v25
     0xA48	VMUDL	$v22, $v26, $v24
     0xA4C	VMADM	$v23, $v27, $v24
     0xA50	VMADN	$v26, $v26, $v25
     0xA54	JR	RA
     0xA58	VMADH	$v27, $v27, $v25
     0xA5C	J	0x164
     0xA60	ANDI	A1, S4, 0x003F
     0xA64	J	0x060
     0xA68	OR	S5, S5, S4
     0xA6C	J	0x060
     0xA70	AND	S5, S5, S4
     0xA74	J	0x060
     0xA78	SW	S4, +0x0000(S3)
     0xA7C	XOR	V0, S5, S3
     0xA80	SW	S3, +0x0038(S2)
     0xA84	ANDI	V0, V0, 0x0002
     0xA88	J	0x060
     0xA8C	XOR	S5, S5, V0
     0xA90	LHU	T3, -0x000C(S1)
     0xA94	LHU	T4, -0x000A(S1)
     0xA98	LHU	T5, -0x0004(S1)
     0xA9C	LBU	S6, -0x0007(S1)
     0xAA0	LBU	S7, -0x0006(S1)
     0xAA4	LBU	T8, -0x0005(S1)
     0xAA8	SLL	V0, S5, 0xF
     0xAAC	BGEZ	V0, 0xAD4
     0xAB0	LBU	T9, -0x0008(S1)
     0xAB4	LBU	AT, +0x0013(T7)
     0xAB8	LBU	V1, +0x0013(T3)
     0xABC	LBU	A0, +0x0013(T4)
     0xAC0	LBU	A1, +0x0013(T5)
     0xAC4	SB	AT, +0x0D43(T9)
     0xAC8	SB	V1, +0x0D43(S6)
     0xACC	SB	A0, +0x0D43(S7)
     0xAD0	SB	A1, +0x0D43(T8)
     0xAD4	LW	V1, +0x0D40(S6)
     0xAD8	LW	A0, +0x0D40(S7)
     0xADC	LW	A1, +0x0D40(T8)
     0xAE0	LW	AT, +0x0D40(T9)
     0xAE4	ANDI	V0, S3, 0x0200
     0xAE8	SW	V1, +0x0010(T3)
     0xAEC	SW	A0, +0x0010(T4)
     0xAF0	BEQZ	V0, 0xA00
     0xAF4	SW	A1, +0x0010(T5)
     0xAF8	ANDI	V0, S3, 0x0800
     0xAFC	BNE	V0, R0, 0x164
     0xB00	ORI	A1, R0, 0x002A
     0xB04	LDV	$v0[0], +0x000(S1)
     0xB08	LDV	$v0[8], +0x001(S1)
     0xB0C	ADDI	S1, S1, 0x0010
     0xB10	SLV	$v0[0], +0x005(T3)
     0xB14	SLV	$v0[4], +0x005(T4)
     0xB18	JR	RA
     0xB1C	SLV	$v0[8], +0x005(T5)
     0xB20	JAL	0xB88
     0xB24	NOP
     0xB28	JAL	0xA90
     0xB2C	ORI	T7, R0, 0x0000
     0xB30	JAL	0x1A8
     0xB34	OR	T7, R0, T3
     0xB38	J	0x0DC
     0xB3C	ORI	RA, R0, 0x1060
     0xB40	JAL	0xB88
     0xB44	LHU	T7, +0x0006(S1)
     0xB48	JAL	0xA90
     0xB4C	SH	T7, +0x037C(R0)
     0xB50	SH	T3, +0x0378(R0)
     0xB54	SH	T5, +0x037A(R0)
     0xB58	SW	AT, +0x0010(T7)
     0xB5C	SLV	$v0[12], +0x005(T7)
     0xB60	JAL	0x1A8
     0xB64	OR	T7, R0, T3
     0xB68	JAL	0x0DC
     0xB6C	LHU	T4, +0x037A(R0)
     0xB70	LHU	T3, +0x0378(R0)
     0xB74	LHU	T5, +0x037C(R0)
     0xB78	JAL	0x1A8
     0xB7C	OR	T7, R0, T3
     0xB80	J	0x0DC
     0xB84	ORI	RA, R0, 0x1060
     0xB88	LBU	V0, +0x058A(R0)
     0xB8C	ADDI	S1, S1, 0x0008
     0xB90	BNE	V0, R0, 0xB9C
     0xB94	SB	S3, +0x058A(R0)
     0xB98	JR	RA
     0xB9C	ADDI	V0, V0, 0xFFFF
     0xBA0	ANDI	A0, S3, 0x0200
     0xBA4	BEQZ	A0, 0x060
     0xBA8	SB	V0, +0x058A(R0)
     0xBAC	J	0x060
     0xBB0	ADDI	S1, S1, 0x0010
     0xBB4	SRL	T2, S4, 0x18
     0xBB8	SRL	V0, S3, 0x16
     0xBBC	ANDI	V0, V0, 0x0001
     0xBC0	BNE	V0, R0, 0x164
     0xBC4	ORI	A1, R0, 0x002D
     0xBC8	J	0x834
     0xBCC	ORI	S8, R0, 0x1060
     0xBD0	SRA	A3, S4, 0x18
     0xBD4	ANDI	T0, A3, 0x007F
     0xBD8	SRL	S3, S3, 0x16
     0xBDC	ANDI	V0, S3, 0x0002
     0xBE0	BEQZ	V0, 0xC30
     0xBE4	ORI	V1, R0, 0x0480
     0xBE8	SLL	A1, T0, 0x1
     0xBEC	ADDI	T1, A1, 0x0480
     0xBF0	SLL	A1, A1, 0x1
     0xBF4	ADDI	A0, A1, 0x0480
     0xBF8	LHU	V0, -0x0002(T1)
     0xBFC	ANDI	AT, V0, 0xF800
     0xC00	SLL	A2, AT, 0x10
     0xC04	ANDI	AT, V0, 0x07E0
     0xC08	SLL	AT, AT, 0xD
     0xC0C	OR	A2, A2, AT
     0xC10	ANDI	V0, V0, 0x001F
     0xC14	SLL	AT, V0, 0xB
     0xC18	OR	A2, A2, AT
     0xC1C	ORI	A2, A2, 0x00FF
     0xC20	ADDI	A0, A0, 0xFFFC
     0xC24	ADDI	T1, T1, 0xFFFE
     0xC28	BNE	V1, A0, 0xBF8
     0xC2C	SW	A2, +0x0000(A0)
     0xC30	LB	A1, +0x058B(R0)
     0xC34	OR	A3, A3, A1
     0xC38	BGEZ	A3, 0xC70
     0xC3C	ORI	A0, R0, 0x0D40
     0xC40	LUV	$v5[0], +0x02B(R0)
     0xC44	LUV	$v3[0], +0x000(V1)
     0xC48	LUV	$v4[0], +0x001(V1)
     0xC4C	ADDI	T0, T0, 0xFFFC
     0xC50	ADDI	V1, V1, 0x0010
     0xC54	VMULF	$v3, $v3, $v5
     0xC58	ADDI	A0, A0, 0x0010
     0xC5C	VMULF	$v4, $v4, $v5
     0xC60	SUV	$v3[0], -0x002(A0)
     0xC64	BGTZ	T0, 0xC44
     0xC68	SUV	$v4[0], -0x001(A0)
     0xC6C	J	0x060
     0xC70	ANDI	V0, S3, 0x0001
     0xC74	BNE	V0, R0, 0x164
     0xC78	ORI	A1, R0, 0x0021
     0xC7C	J	0x164
     0xC80	ORI	A1, R0, 0x001B
     0xC84	SRL	V0, S4, 0x18
     0xC88	J	0x060
     0xC8C	SB	V0, +0x058B(R0)
     0xC90	ANDI	A0, S3, 0x00FF
     0xC94	BEQZ	A0, 0xD04
     0xC98	OR	T1, S4, R0
     0xC9C	SRL	V1, S3, 0x8
     0xCA0	ANDI	V1, V1, 0x0FFF
     0xCA4	SLL	V0, S4, 0x8
     0xCA8	BNE	V0, R0, 0xD00
     0xCAC	OR	V0, S4, R0
     0xCB0	LW	A2, +0x0FDC(R0)
     0xCB4	ADDI	A3, A0, 0x0001
     0xCB8	SUB	A1, A2, A3
     0xCBC	BGEZ	A1, 0xCE0
     0xCC0	LW	V0, +0x0FD4(R0)
     0xCC4	SUB	A3, A0, A2
     0xCC8	JAL	0x080
     0xCCC	ADDI	A0, A2, 0xFFFF
     0xCD0	ADD	V1, V1, A2
     0xCD4	OR	A0, A3, R0
     0xCD8	J	0xCF8
     0xCDC	ORI	RA, R0, 0x1CB0
     0xCE0	JAL	0x080
     0xCE4	ADD	T0, V0, A3
     0xCE8	SW	A1, +0x0FDC(R0)
     0xCEC	BNE	A1, R0, 0xD04
     0xCF0	SW	T0, +0x0FD4(R0)
     0xCF4	ORI	RA, R0, 0x1D04
     0xCF8	J	0xD28
     0xCFC	LW	S4, +0x0FD8(R0)
     0xD00	JAL	0x080
     0xD04	SRL	A1, S3, 0x13
     0xD08	ANDI	A1, A1, 0x0006
     0xD0C	LHU	A1, +0x00E4(A1)
     0xD10	JR	A1
     0xD14	OR	S4, T1, R0
     0xD18	JAL	0xD28
     0xD1C	ANDI	S3, S3, 0x01FF
     0xD20	J	0x060
     0xD24	SW	S3, +0x0FDC(R0)
     0xD28	ORI	V0, R0, 0x0FD8
     0xD2C	MTC0	V0, SP memory address
     0xD30	MTC0	S4, SP DRAM DMA address
     0xD34	MTC0	R0, SP read DMA length
     0xD38	BNE	V0, R0, 0xD38
     0xD3C	MFC0	V0, SP DMA busy
     0xD40	ORI	V0, R0, 0x0100
     0xD44	SW	V0, +0x0FDC(R0)
     0xD48	ADDI	V0, S4, 0x0008
     0xD4C	JR	RA
     0xD50	SW	V0, +0x0FD4(R0)
     0xD54	NOP
     0xD58	NOP
     0xD5C	RSP: Unknown	00 00 0D 58
     0xD60	JAL	0x0DC
     0xD64	NOP
     0xD68	ORI	V0, R0, 0x4000
     0xD6C	MTC0	V0, SP status
     0xD70	NOP
     0xD74	NOP
     0xD78	BREAK
     0xD7C	NOP
     0xD80	SLL	T1, T1, 0x2
     0xD84	VMOV	$v14[7], $v30 [0]
     0xD88	ADDI	T1, T1, 0x0004
     0xD8C	VMOV	$v19[3], $v30 [4]
     0xD90	ANDI	T1, T1, 0xFFF8
     0xD94	VMOV	$v19[7], $v30 [4]
     0xD98	ADDI	T1, T1, 0x0D40
     0xD9C	LUV	$v18[0], +0x02B(R0)
     0xDA0	VMULF	$v0, $v0, $v30 [0]
     0xDA4	ORI	T3, R0, 0x0D40
     0xDA8	ADDI	T3, T3, 0x0010
     0xDAC	SLTU	V0, T3, T1
     0xDB0	BNE	V0, R0, 0xDA8
     0xDB4	SQV	$v0[0], -0x001(T3)
     0xDB8	BEQZ	A2, 0xF98
     0xDBC	ORI	A3, R0, 0x0B00
     0xDC0	LBU	V0, +0x0013(A3)
     0xDC4	LUV	$v6[0], +0x002(A3)
     0xDC8	ORI	V1, R0, 0x0001
     0xDCC	ORI	T0, R0, 0x0480
     0xDD0	ORI	T3, R0, 0x0D40
     0xDD4	VMOV	$v6[4], $v6 [0]
     0xDD8	VMOV	$v6[5], $v6 [1]
     0xDDC	VMOV	$v6[6], $v6 [2]
     0xDE0	VMOV	$v6[3], $v30 [0]
     0xDE4	BEQZ	V0, 0xF60
     0xDE8	VMOV	$v6[7], $v30 [0]
     0xDEC	BEQ	V0, V1, 0xEB0
     0xDF0	ORI	T2, R0, 0x0380
     0xDF4	LDV	$v11[0], +0x000(A3)
     0xDF8	LDV	$v11[8], +0x000(A3)
     0xDFC	LBU	A0, +0x0003(T2)
     0xE00	LBU	V1, +0x0007(T2)
     0xE04	LLV	$v13[0], +0x005(A3)
     0xE08	ADDIU	A0, A0, 0x0170
     0xE0C	ADDIU	V1, V1, 0x0170
     0xE10	LDV	$v15[0], +0x000(A0)
     0xE14	LDV	$v15[8], +0x000(V1)
     0xE18	LUV	$v8[0], +0x000(T3)
     0xE1C	VMUDH	$v15, $v15, $v14
     0xE20	LUV	$v5[0], +0x000(T0)
     0xE24	VSUB	$v0, $v15, $v11
     0xE28	ADDIU	T2, T2, 0x0008
     0xE2C	VMUDM	$v3, $v0, $v7 [0]
     0xE30	ADDIU	T0, T0, 0x0008
     0xE34	VMADN	$v12, $v0, $v30 [0]
     0xE38	VMUDL	$v2, $v12, $v12
     0xE3C	ADDIU	T3, T3, 0x0008
     0xE40	VMADM	$v2, $v3, $v12
     0xE44	LBU	A0, +0x0003(T2)
     0xE48	VMADN	$v9, $v12, $v3
     0xE4C	LBU	V1, +0x0007(T2)
     0xE50	VMADH	$v10, $v3, $v3
     0xE54	VADDC	$v9, $v9, $v9 [1q]
     0xE58	VADD	$v10, $v10, $v10 [1q]
     0xE5C	ADDIU	A0, A0, 0x0170
     0xE60	VADDC	$v9, $v9, $v9 [2h]
     0xE64	ADDIU	V1, V1, 0x0170
     0xE68	VADD	$v10, $v10, $v10 [2h]
     0xE6C	LDV	$v15[0], +0x000(A0)
     0xE70	VMUDL	$v2, $v9, $v13 [1]
     0xE74	VMADM	$v2, $v10, $v13 [1]
     0xE78	VMADN	$v0, $v9, $v13 [0]
     0xE7C	LDV	$v15[8], +0x000(V1)
     0xE80	VMADH	$v1, $v10, $v13 [0]
     0xE84	VMULF	$v5, $v5, $v18
     0xE88	VEQ	$v2, $v1, $v30 [4]
     0xE8C	VMRG	$v0, $v0, $v30 [0]
     0xE90	VMUDM	$v1, $v6, $v0 [0h]
     0xE94	VMULF	$v0, $v5, $v1
     0xE98	VMADH	$v0, $v8, $v30 [1]
     0xE9C	VAND	$v5, $v5, $v19
     0xEA0	VOR	$v0, $v0, $v5
     0xEA4	BNE	T3, T1, 0xE18
     0xEA8	SUV	$v0[0], -0x001(T3)
     0xEAC	J	0xF8C
     0xEB0	LW	T4, +0x05B0(R0)
     0xEB4	LW	T5, +0x05B4(R0)
     0xEB8	LDV	$v17[0], +0x000(A3)
     0xEBC	LDV	$v17[8], +0x000(A3)
     0xEC0	OR	S6, T4, T5
     0xEC4	BEQZ	S6, 0xEE8
     0xEC8	LPV	$v4[0], +0x000(T2)
     0xECC	LDV	$v3[0], +0x000(A3)
     0xED0	LDV	$v3[8], +0x000(A3)
     0xED4	LDV	$v16[0], +0x001(A3)
     0xED8	LDV	$v16[8], +0x001(A3)
     0xEDC	LUI	T6, 0xFFF0
     0xEE0	ORI	T6, T6, 0x0F00
     0xEE4	ORI	T7, R0, 0x0010
     0xEE8	VMUDH	$v4, $v4, $v14
     0xEEC	BEQZ	S6, 0xF18
     0xEF0	ADDI	T2, T2, 0x0008
     0xEF4	ANDI	V0, T4, 0x0003
     0xEF8	SLL	V0, V0, 0x3
     0xEFC	SRLV	V0, T6, V0
     0xF00	CTC2	V0, 1
     0xF04	ADDI	T7, T7, 0xFFFF
     0xF08	VMRG	$v17, $v16, $v3
     0xF0C	BNE	T7, R0, 0xF18
     0xF10	SRL	T4, T4, 0x2
     0xF14	ORI	T4, T5, 0x0000
     0xF18	VMULF	$v0, $v17, $v4
     0xF1C	LUV	$v5[0], +0x000(T0)
     0xF20	VADD	$v0, $v0, $v0 [1q]
     0xF24	LUV	$v8[0], +0x000(T3)
     0xF28	VADD	$v0, $v0, $v0 [2h]
     0xF2C	ADDI	T3, T3, 0x0008
     0xF30	VMULF	$v5, $v5, $v18
     0xF34	VGE	$v0, $v0, $v30 [0]
     0xF38	ADDI	T0, T0, 0x0008
     0xF3C	VMULF	$v1, $v6, $v0 [0h]
     0xF40	VMULF	$v0, $v5, $v1
     0xF44	LPV	$v4[0], +0x000(T2)
     0xF48	VMADH	$v0, $v8, $v30 [1]
     0xF4C	VAND	$v5, $v5, $v19
     0xF50	VOR	$v0, $v0, $v5
     0xF54	BNE	T3, T1, 0xEE8
     0xF58	SUV	$v0[0], -0x001(T3)
     0xF5C	J	0xF8C
     0xF60	LUV	$v5[0], +0x000(T0)
     0xF64	LUV	$v8[0], +0x000(T3)
     0xF68	ADDI	T0, T0, 0x0008
     0xF6C	ADDI	T3, T3, 0x0008
     0xF70	VMULF	$v5, $v5, $v18
     0xF74	VMULF	$v0, $v5, $v6
     0xF78	VMADH	$v0, $v8, $v30 [1]
     0xF7C	VAND	$v5, $v5, $v19
     0xF80	VOR	$v0, $v0, $v5
     0xF84	BNE	T3, T1, 0xF60
     0xF88	SUV	$v0[0], -0x001(T3)
     0xF8C	ADDI	A2, A2, 0xFFFF
     0xF90	BNE	A2, R0, 0xDC0
     0xF94	ADDI	A3, A3, 0x0018
     0xF98	SW	R0, +0x05B0(R0)
     0xF9C	J	0x060
     0xFA0	SW	R0, +0x05B4(R0)
     0xFA4	NOP
     0xFA8	VMUDH	$v0, $v1, $v30 [4]
     0xFAC	VMUDN	$v12, $v5, $v1
     0xFB0	VMADH	$v11, $v4, $v1
     0xFB4	VMADN	$v12, $v30, $v30 [0]
     0xFB8	VMADN	$v28, $v10, $v0
     0xFBC	VMADH	$v29, $v9, $v0
     0xFC0	VMADN	$v28, $v30, $v30 [0]
     0xFC4	VADDC	$v26, $v28, $v28 [0q]
     0xFC8	VADD	$v27, $v29, $v29 [0q]
     0xFCC	VADDC	$v28, $v26, $v26 [1h]
     0xFD0	VADD	$v29, $v27, $v27 [1h]
     0xFD4	MFC2	V0, $v29[6]
     0xFD8	VRCPH	$v7[3], $v29 [3]
     0xFDC	VRCPL	$v3[3], $v28 [3]
     0xFE0	VRCPH	$v7[3], $v30 [0]
     0xFE4	VMUDN	$v3, $v3, $v30 [2]
     0xFE8	BGEZ	V0, 0xFF8
     0xFEC	VMADH	$v7, $v7, $v30 [2]
     0xFF0	VMUDN	$v3, $v3, $v30 [4]
     0xFF4	VMADH	$v7, $v7, $v30 [4]
     0xFF8	VEQ	$v7, $v7, $v30 [0]
     0xFFC	VMRG	$v3, $v3, $v30 [4]
    Does anybody know what the RSP Code means?, its exactly the same as Battle for Naboo.

    Never saw this type of Code

    Indy, Battle for Naboo and Rogue Squadron share the same beginning of code:

     0x000	J	0x064
     0x004	ADDI	AT, R0, 0x0FC0
     0x008	LW	V0, +0x0010(AT)
     0x00C	ADDI	V1, R0, 0x0F7F
     0x010	ADDI	A3, R0, 0x1080
     0x014	MTC0	A3, SP memory address
     0x018	MTC0	V0, SP DRAM DMA address
     0x01C	MTC0	V1, SP read DMA length
     0x020	MFC0	A0, SP DMA busy
     0x024	BNE	A0, R0, 0x020
     0x028	NOP
     0x02C	JAL	0x03C
     0x030	NOP
     0x034	JR	A3
     0x038	MTC0	R0, SP semaphore
     0x03C	MFC0	T0, SP status
     0x040	ANDI	T0, T0, 0x0080
     0x044	BNE	T0, R0, 0x050
     0x048	NOP
     0x04C	JR	RA
     0x050	MTC0	R0, SP semaphore
     0x054	ORI	T0, R0, 0x5200
     0x058	MTC0	T0, SP status
     0x05C	BREAK
     0x060	NOP
     0x064	LW	V0, +0x0004(AT)
     0x068	ANDI	V0, V0, 0x0002
     0x06C	BEQZ	V0, 0x08C
     0x070	NOP
     0x074	JAL	0x03C
     0x078	NOP
     0x07C	MFC0	V0, DP CMD status
     0x080	MFC0	A2, DP CMD status
     0x084	ANDI	A1, A2, 0x0001
     0x088	BEQZ	A1, 0x0A8
     0x08C	ANDI	A1, A2, 0x0100
     0x090	BEQZ	A1, 0x0A8
     0x094	NOP
     0x098	MFC0	A1, DP CMD status
     0x09C	ANDI	A1, A1, 0x0100
     0x0A0	BGTZ	A1, 0x098
     0x0A4	NOP
     0x0A8	VXOR	$v0, $v0, $v0
     0x0AC	LW	A0, +0x0030(AT)
     0x0B0	LW	V1, +0x0034(AT)

    Last edited by HeadHunter2; October 13th, 2017 at 19:53.

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